As the demand for smaller electronic products grows, manufacturers and others in the electronics industry continually seek ways to reduce the size of integrated circuits used in the electronic products. In that regard, three-dimensional (3D) type integrated circuit (IC) packaging techniques have been developed and used.
One packaging technique that has been developed is Package-on-Package (PoP). As the name implies, PoP is a semiconductor packaging innovation that involves stacking one package on top of another package. A PoP device may combine vertically discrete memory and logic packages. In some cases, the PoP device is referred to an integrated fan-out (InFO) PoP device because the contact positions of the original die are “fanned out” to a larger foot print.
If not appropriately or suitably formed, the InFO PoP devices may be subject to electrical failures or have poor reliability. For example, the InFO PoP devices may experience crack propagation or suffer ball fatigue.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.